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A technique to build a secret key in integrated circuits for identification and authentication applications

  • J.W. Lee
  • , D. Lim
  • , B. Gassend
  • , G.E. Suh
  • , M. Van Dijk
  • , S. Devadas

Research output: Chapter in Book / Report / Conference proceedingConference contributionAcademicpeer-review

Abstract

This paper describes a technique that exploits the statistical delay variations of wires and transistors across ICs to build a secret key unique to each IC. To explore its feasibility, we fabricated a candidate circuit to generate a response based on its delay characteristics. We show that there exists enough delay variation across ICs implementing the proposed circuit to identify individual ICs. Further, the circuit functions reliably over a practical range of environmental variation such as temperature and voltage.
Original languageEnglish
Title of host publication2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI
Pages176-179
Publication statusPublished - 2004
Externally publishedYes
Event2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI - , United States
Duration: 17 Jun 200419 Jun 2004

Conference

Conference2004 Symposium on VLSI Circuits, Digest of Technical Papers, 2004 VLSI
Country/TerritoryUnited States
Period17/06/0419/06/04

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