Abstract
© 2015 IEEE.The challenges faced in securing embedded computing systems against multifaceted memory safety vulnerabilities have prompted great interest in the development of memory safety countermeasures. These countermeasures either provide protection only against their corresponding type of vulnerabilities, or incur substantial architectural modifications and overheads in order to provide complete safety, which makes them infeasible for embedded systems. In this paper, we propose M-MAP: A comprehensive system based on multi-factor memory authentication for complete memory safety. We examine certain crucial implications of composing memory integrity verification and bounds checking schemes in a comprehensive system. Based on these implications, we implement M-MAP with hardware based memory integrity verification and software based bounds checking to achieve a balance between hardware modifications and performance. We demonstrate that M-MAP implemented on top of a lightweight out-of-order processor delivers complete memory safety with only 32% performance overhead on average, while incurring minimal hardware modifications, and area overhead.
Original language | English |
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Title of host publication | Proceedings of the 33rd IEEE International Conference on Computer Design, ICCD 2015 |
Publisher | Institute of Electrical and Electronics Engineers Inc. |
Pages | 471-474 |
ISBN (Electronic) | 9781467371650 |
DOIs | |
Publication status | Published - 14 Dec 2015 |
Externally published | Yes |
Event | 33rd IEEE International Conference on Computer Design, ICCD 2015 - New York City, United States Duration: 18 Oct 2015 → 21 Oct 2015 |
Conference
Conference | 33rd IEEE International Conference on Computer Design, ICCD 2015 |
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Country/Territory | United States |
City | New York City |
Period | 18/10/15 → 21/10/15 |