Threats to Instrument Validity Within “in Silico” Research: Software Engineering to the Rescue

Research output: Chapter in Book / Report / Conference proceeding › Chapter › Academic › peer-review

Original language	English
Title of host publication	Leveraging Applications of Formal Methods, Verification and Validation. Software Engineering Methodologies
DOIs	https://doi.org/10.1007/978-3-031-75387-9_6
Publication status	Published - 2024

Access to Document

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title = "Threats to Instrument Validity Within “in Silico” Research: Software Engineering to the Rescue",

author = "Serge Demeyer and Roover, \{Coen De\} and Mutlu Beyazit and Johannes H{\"a}rtel",

year = "2024",

doi = "10.1007/978-3-031-75387-9\_6",

language = "English",

booktitle = "Leveraging Applications of Formal Methods, Verification and Validation. Software Engineering Methodologies",

}

Threats to Instrument Validity Within “in Silico” Research: Software Engineering to the Rescue. / Demeyer, Serge; Roover, Coen De; Beyazit, Mutlu et al.
Leveraging Applications of Formal Methods, Verification and Validation. Software Engineering Methodologies . 2024.

Research output: Chapter in Book / Report / Conference proceeding › Chapter › Academic › peer-review

TY - CHAP

T1 - Threats to Instrument Validity Within “in Silico” Research: Software Engineering to the Rescue

AU - Demeyer, Serge

AU - Roover, Coen De

AU - Beyazit, Mutlu

AU - Härtel, Johannes

PY - 2024

Y1 - 2024

UR - https://doi.org/10.1007/978-3-031-75387-9_6

U2 - 10.1007/978-3-031-75387-9_6

DO - 10.1007/978-3-031-75387-9_6

M3 - Chapter

BT - Leveraging Applications of Formal Methods, Verification and Validation. Software Engineering Methodologies

ER -